
/mnt/data/genmitsu_provenance_v3/build/reference_O0.o:	file format elf32-littlearm

Disassembly of section .text:

00000000 <ref_convert_delta_vector_to_unit_vector>:
       0: b580         	push	{r7, lr}
       2: 466f         	mov	r7, sp
       4: b088         	sub	sp, #0x20
       6: 9007         	str	r0, [sp, #0x1c]
       8: 2000         	movs	r0, #0x0
       a: 9005         	str	r0, [sp, #0x14]
       c: f807 0c05    	strb	r0, [r7, #-5]
      10: e7ff         	b	0x12 <ref_convert_delta_vector_to_unit_vector+0x12> @ imm = #-0x2
      12: f817 0c05    	ldrb	r0, [r7, #-5]
      16: 2803         	cmp	r0, #0x3
      18: dc20         	bgt	0x5c <ref_convert_delta_vector_to_unit_vector+0x5c> @ imm = #0x40
      1a: e7ff         	b	0x1c <ref_convert_delta_vector_to_unit_vector+0x1c> @ imm = #-0x2
      1c: 9807         	ldr	r0, [sp, #0x1c]
      1e: f817 1c05    	ldrb	r1, [r7, #-5]
      22: f850 0021    	ldr.w	r0, [r0, r1, lsl #2]
      26: 2100         	movs	r1, #0x0
      28: f7ff fffe    	bl	0x28 <ref_convert_delta_vector_to_unit_vector+0x28> @ imm = #-0x4
			00000028:  R_ARM_THM_CALL	__aeabi_fcmpeq
      2c: b978         	cbnz	r0, 0x4e <ref_convert_delta_vector_to_unit_vector+0x4e> @ imm = #0x1e
      2e: e7ff         	b	0x30 <ref_convert_delta_vector_to_unit_vector+0x30> @ imm = #-0x2
      30: 9807         	ldr	r0, [sp, #0x1c]
      32: f817 1c05    	ldrb	r1, [r7, #-5]
      36: f850 1021    	ldr.w	r1, [r0, r1, lsl #2]
      3a: 9805         	ldr	r0, [sp, #0x14]
      3c: 9003         	str	r0, [sp, #0xc]
      3e: 4608         	mov	r0, r1
      40: f7ff fffe    	bl	0x40 <ref_convert_delta_vector_to_unit_vector+0x40> @ imm = #-0x4
			00000040:  R_ARM_THM_CALL	__aeabi_fmul
      44: 9903         	ldr	r1, [sp, #0xc]
      46: f7ff fffe    	bl	0x46 <ref_convert_delta_vector_to_unit_vector+0x46> @ imm = #-0x4
			00000046:  R_ARM_THM_CALL	__aeabi_fadd
      4a: 9005         	str	r0, [sp, #0x14]
      4c: e7ff         	b	0x4e <ref_convert_delta_vector_to_unit_vector+0x4e> @ imm = #-0x2
      4e: e7ff         	b	0x50 <ref_convert_delta_vector_to_unit_vector+0x50> @ imm = #-0x2
      50: f817 0c05    	ldrb	r0, [r7, #-5]
      54: 3001         	adds	r0, #0x1
      56: f807 0c05    	strb	r0, [r7, #-5]
      5a: e7da         	b	0x12 <ref_convert_delta_vector_to_unit_vector+0x12> @ imm = #-0x4c
      5c: 9805         	ldr	r0, [sp, #0x14]
      5e: f7ff fffe    	bl	0x5e <ref_convert_delta_vector_to_unit_vector+0x5e> @ imm = #-0x4
			0000005e:  R_ARM_THM_CALL	sqrtf
      62: 9005         	str	r0, [sp, #0x14]
      64: 9905         	ldr	r1, [sp, #0x14]
      66: f04f 507e    	mov.w	r0, #0x3f800000
      6a: f7ff fffe    	bl	0x6a <ref_convert_delta_vector_to_unit_vector+0x6a> @ imm = #-0x4
			0000006a:  R_ARM_THM_CALL	__aeabi_fdiv
      6e: 9004         	str	r0, [sp, #0x10]
      70: 2000         	movs	r0, #0x0
      72: f807 0c05    	strb	r0, [r7, #-5]
      76: e7ff         	b	0x78 <ref_convert_delta_vector_to_unit_vector+0x78> @ imm = #-0x2
      78: f817 0c05    	ldrb	r0, [r7, #-5]
      7c: 2803         	cmp	r0, #0x3
      7e: dc15         	bgt	0xac <ref_convert_delta_vector_to_unit_vector+0xac> @ imm = #0x2a
      80: e7ff         	b	0x82 <ref_convert_delta_vector_to_unit_vector+0x82> @ imm = #-0x2
      82: 9904         	ldr	r1, [sp, #0x10]
      84: 9807         	ldr	r0, [sp, #0x1c]
      86: 9002         	str	r0, [sp, #0x8]
      88: f817 2c05    	ldrb	r2, [r7, #-5]
      8c: 9201         	str	r2, [sp, #0x4]
      8e: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
      92: f7ff fffe    	bl	0x92 <ref_convert_delta_vector_to_unit_vector+0x92> @ imm = #-0x4
			00000092:  R_ARM_THM_CALL	__aeabi_fmul
      96: 9a01         	ldr	r2, [sp, #0x4]
      98: 9902         	ldr	r1, [sp, #0x8]
      9a: f841 0022    	str.w	r0, [r1, r2, lsl #2]
      9e: e7ff         	b	0xa0 <ref_convert_delta_vector_to_unit_vector+0xa0> @ imm = #-0x2
      a0: f817 0c05    	ldrb	r0, [r7, #-5]
      a4: 3001         	adds	r0, #0x1
      a6: f807 0c05    	strb	r0, [r7, #-5]
      aa: e7e5         	b	0x78 <ref_convert_delta_vector_to_unit_vector+0x78> @ imm = #-0x36
      ac: 9805         	ldr	r0, [sp, #0x14]
      ae: b008         	add	sp, #0x20
      b0: bd80         	pop	{r7, pc}
      b2: bf00         	nop

000000b4 <ref_limit_value_by_axis_maximum>:
      b4: b580         	push	{r7, lr}
      b6: 466f         	mov	r7, sp
      b8: b086         	sub	sp, #0x18
      ba: 9005         	str	r0, [sp, #0x14]
      bc: 9104         	str	r1, [sp, #0x10]
      be: f64f 70ff    	movw	r0, #0xffff
      c2: f6c7 707f    	movt	r0, #0x7f7f
      c6: 9002         	str	r0, [sp, #0x8]
      c8: 2000         	movs	r0, #0x0
      ca: f807 0c09    	strb	r0, [r7, #-9]
      ce: e7ff         	b	0xd0 <ref_limit_value_by_axis_maximum+0x1c> @ imm = #-0x2
      d0: f817 0c09    	ldrb	r0, [r7, #-9]
      d4: 2803         	cmp	r0, #0x3
      d6: dc25         	bgt	0x124 <ref_limit_value_by_axis_maximum+0x70> @ imm = #0x4a
      d8: e7ff         	b	0xda <ref_limit_value_by_axis_maximum+0x26> @ imm = #-0x2
      da: 9804         	ldr	r0, [sp, #0x10]
      dc: f817 1c09    	ldrb	r1, [r7, #-9]
      e0: f850 0021    	ldr.w	r0, [r0, r1, lsl #2]
      e4: 2100         	movs	r1, #0x0
      e6: f7ff fffe    	bl	0xe6 <ref_limit_value_by_axis_maximum+0x32> @ imm = #-0x4
			000000e6:  R_ARM_THM_CALL	__aeabi_fcmpeq
      ea: b9a0         	cbnz	r0, 0x116 <ref_limit_value_by_axis_maximum+0x62> @ imm = #0x28
      ec: e7ff         	b	0xee <ref_limit_value_by_axis_maximum+0x3a> @ imm = #-0x2
      ee: 9805         	ldr	r0, [sp, #0x14]
      f0: f817 2c09    	ldrb	r2, [r7, #-9]
      f4: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
      f8: 9904         	ldr	r1, [sp, #0x10]
      fa: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
      fe: f7ff fffe    	bl	0xfe <ref_limit_value_by_axis_maximum+0x4a> @ imm = #-0x4
			000000fe:  R_ARM_THM_CALL	__aeabi_fdiv
     102: 9902         	ldr	r1, [sp, #0x8]
     104: 9101         	str	r1, [sp, #0x4]
     106: f000 f825    	bl	0x154 <f_abs>           @ imm = #0x4a
     10a: 4601         	mov	r1, r0
     10c: 9801         	ldr	r0, [sp, #0x4]
     10e: f000 f80d    	bl	0x12c <f_min>           @ imm = #0x1a
     112: 9002         	str	r0, [sp, #0x8]
     114: e7ff         	b	0x116 <ref_limit_value_by_axis_maximum+0x62> @ imm = #-0x2
     116: e7ff         	b	0x118 <ref_limit_value_by_axis_maximum+0x64> @ imm = #-0x2
     118: f817 0c09    	ldrb	r0, [r7, #-9]
     11c: 3001         	adds	r0, #0x1
     11e: f807 0c09    	strb	r0, [r7, #-9]
     122: e7d5         	b	0xd0 <ref_limit_value_by_axis_maximum+0x1c> @ imm = #-0x56
     124: 9802         	ldr	r0, [sp, #0x8]
     126: b006         	add	sp, #0x18
     128: bd80         	pop	{r7, pc}
     12a: bf00         	nop

0000012c <f_min>:
     12c: b580         	push	{r7, lr}
     12e: 466f         	mov	r7, sp
     130: b084         	sub	sp, #0x10
     132: 9003         	str	r0, [sp, #0xc]
     134: 9102         	str	r1, [sp, #0x8]
     136: 9803         	ldr	r0, [sp, #0xc]
     138: 9902         	ldr	r1, [sp, #0x8]
     13a: f7ff fffe    	bl	0x13a <f_min+0xe>       @ imm = #-0x4
			0000013a:  R_ARM_THM_CALL	__aeabi_fcmplt
     13e: b118         	cbz	r0, 0x148 <f_min+0x1c>  @ imm = #0x6
     140: e7ff         	b	0x142 <f_min+0x16>      @ imm = #-0x2
     142: 9803         	ldr	r0, [sp, #0xc]
     144: 9001         	str	r0, [sp, #0x4]
     146: e002         	b	0x14e <f_min+0x22>      @ imm = #0x4
     148: 9802         	ldr	r0, [sp, #0x8]
     14a: 9001         	str	r0, [sp, #0x4]
     14c: e7ff         	b	0x14e <f_min+0x22>      @ imm = #-0x2
     14e: 9801         	ldr	r0, [sp, #0x4]
     150: b004         	add	sp, #0x10
     152: bd80         	pop	{r7, pc}

00000154 <f_abs>:
     154: b580         	push	{r7, lr}
     156: 466f         	mov	r7, sp
     158: b082         	sub	sp, #0x8
     15a: 9001         	str	r0, [sp, #0x4]
     15c: 9801         	ldr	r0, [sp, #0x4]
     15e: 2100         	movs	r1, #0x0
     160: f7ff fffe    	bl	0x160 <f_abs+0xc>       @ imm = #-0x4
			00000160:  R_ARM_THM_CALL	__aeabi_fcmplt
     164: b128         	cbz	r0, 0x172 <f_abs+0x1e>  @ imm = #0xa
     166: e7ff         	b	0x168 <f_abs+0x14>      @ imm = #-0x2
     168: 9801         	ldr	r0, [sp, #0x4]
     16a: f080 4000    	eor	r0, r0, #0x80000000
     16e: 9000         	str	r0, [sp]
     170: e002         	b	0x178 <f_abs+0x24>      @ imm = #0x4
     172: 9801         	ldr	r0, [sp, #0x4]
     174: 9000         	str	r0, [sp]
     176: e7ff         	b	0x178 <f_abs+0x24>      @ imm = #-0x2
     178: 9800         	ldr	r0, [sp]
     17a: b002         	add	sp, #0x8
     17c: bd80         	pop	{r7, pc}
     17e: bf00         	nop

00000180 <ref_plan_next_block_index>:
     180: b081         	sub	sp, #0x4
     182: f88d 0003    	strb.w	r0, [sp, #0x3]
     186: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     18a: 3001         	adds	r0, #0x1
     18c: f88d 0003    	strb.w	r0, [sp, #0x3]
     190: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     194: 2824         	cmp	r0, #0x24
     196: d104         	bne	0x1a2 <ref_plan_next_block_index+0x22> @ imm = #0x8
     198: e7ff         	b	0x19a <ref_plan_next_block_index+0x1a> @ imm = #-0x2
     19a: 2000         	movs	r0, #0x0
     19c: f88d 0003    	strb.w	r0, [sp, #0x3]
     1a0: e7ff         	b	0x1a2 <ref_plan_next_block_index+0x22> @ imm = #-0x2
     1a2: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     1a6: b001         	add	sp, #0x4
     1a8: 4770         	bx	lr
     1aa: bf00         	nop

000001ac <ref_plan_buffer_line>:
     1ac: b580         	push	{r7, lr}
     1ae: 466f         	mov	r7, sp
     1b0: b0ac         	sub	sp, #0xb0
     1b2: 902a         	str	r0, [sp, #0xa8]
     1b4: 9129         	str	r1, [sp, #0xa4]
     1b6: f240 0000    	movw	r0, #0x0
			000001b6:  R_ARM_THM_MOVW_ABS_NC	block_buffer_head
     1ba: f2c0 0000    	movt	r0, #0x0
			000001ba:  R_ARM_THM_MOVT_ABS	block_buffer_head
     1be: 7800         	ldrb	r0, [r0]
     1c0: ebc0 01c0    	rsb	r1, r0, r0, lsl #3
     1c4: f240 0000    	movw	r0, #0x0
			000001c4:  R_ARM_THM_MOVW_ABS_NC	block_buffer
     1c8: f2c0 0000    	movt	r0, #0x0
			000001c8:  R_ARM_THM_MOVT_ABS	block_buffer
     1cc: eb00 00c1    	add.w	r0, r0, r1, lsl #3
     1d0: 9028         	str	r0, [sp, #0xa0]
     1d2: 9828         	ldr	r0, [sp, #0xa0]
     1d4: 2100         	movs	r1, #0x0
     1d6: 2238         	movs	r2, #0x38
     1d8: f7ff fffe    	bl	0x1d8 <ref_plan_buffer_line+0x2c> @ imm = #-0x4
			000001d8:  R_ARM_THM_CALL	memset
     1dc: 9829         	ldr	r0, [sp, #0xa4]
     1de: 7800         	ldrb	r0, [r0]
     1e0: 9928         	ldr	r1, [sp, #0xa0]
     1e2: 7548         	strb	r0, [r1, #0x15]
     1e4: 9829         	ldr	r0, [sp, #0xa4]
     1e6: 6880         	ldr	r0, [r0, #0x8]
     1e8: 9928         	ldr	r1, [sp, #0xa0]
     1ea: 6188         	str	r0, [r1, #0x18]
     1ec: 9828         	ldr	r0, [sp, #0xa0]
     1ee: 7d40         	ldrb	r0, [r0, #0x15]
     1f0: 07c0         	lsls	r0, r0, #0x1f
     1f2: b148         	cbz	r0, 0x208 <ref_plan_buffer_line+0x5c> @ imm = #0x12
     1f4: e7ff         	b	0x1f6 <ref_plan_buffer_line+0x4a> @ imm = #-0x2
     1f6: f240 0100    	movw	r1, #0x0
			000001f6:  R_ARM_THM_MOVW_ABS_NC	sys_position
     1fa: f2c0 0100    	movt	r1, #0x0
			000001fa:  R_ARM_THM_MOVT_ABS	sys_position
     1fe: a820         	add	r0, sp, #0x80
     200: 2210         	movs	r2, #0x10
     202: f7ff fffe    	bl	0x202 <ref_plan_buffer_line+0x56> @ imm = #-0x4
			00000202:  R_ARM_THM_CALL	memcpy
     206: e008         	b	0x21a <ref_plan_buffer_line+0x6e> @ imm = #0x10
     208: f240 0100    	movw	r1, #0x0
			00000208:  R_ARM_THM_MOVW_ABS_NC	pl
     20c: f2c0 0100    	movt	r1, #0x0
			0000020c:  R_ARM_THM_MOVT_ABS	pl
     210: a820         	add	r0, sp, #0x80
     212: 2210         	movs	r2, #0x10
     214: f7ff fffe    	bl	0x214 <ref_plan_buffer_line+0x68> @ imm = #-0x4
			00000214:  R_ARM_THM_CALL	memcpy
     218: e7ff         	b	0x21a <ref_plan_buffer_line+0x6e> @ imm = #-0x2
     21a: 2000         	movs	r0, #0x0
     21c: f807 0c45    	strb	r0, [r7, #-69]
     220: e7ff         	b	0x222 <ref_plan_buffer_line+0x76> @ imm = #-0x2
     222: f817 0c45    	ldrb	r0, [r7, #-69]
     226: 2803         	cmp	r0, #0x3
     228: dc6b         	bgt	0x302 <ref_plan_buffer_line+0x156> @ imm = #0xd6
     22a: e7ff         	b	0x22c <ref_plan_buffer_line+0x80> @ imm = #-0x2
     22c: 982a         	ldr	r0, [sp, #0xa8]
     22e: f817 2c45    	ldrb	r2, [r7, #-69]
     232: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
     236: f240 0100    	movw	r1, #0x0
			00000236:  R_ARM_THM_MOVW_ABS_NC	settings
     23a: f2c0 0100    	movt	r1, #0x0
			0000023a:  R_ARM_THM_MOVT_ABS	settings
     23e: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
     242: f7ff fffe    	bl	0x242 <ref_plan_buffer_line+0x96> @ imm = #-0x4
			00000242:  R_ARM_THM_CALL	__aeabi_fmul
     246: f7ff fffe    	bl	0x246 <ref_plan_buffer_line+0x9a> @ imm = #-0x4
			00000246:  R_ARM_THM_CALL	lroundf
     24a: 4601         	mov	r1, r0
     24c: f817 2c45    	ldrb	r2, [r7, #-69]
     250: a824         	add	r0, sp, #0x90
     252: f840 1022    	str.w	r1, [r0, r2, lsl #2]
     256: f817 2c45    	ldrb	r2, [r7, #-69]
     25a: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
     25e: a920         	add	r1, sp, #0x80
     260: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
     264: 1a40         	subs	r0, r0, r1
     266: 9019         	str	r0, [sp, #0x64]
     268: 9819         	ldr	r0, [sp, #0x64]
     26a: f1b0 3fff    	cmp.w	r0, #0xffffffff
     26e: dc04         	bgt	0x27a <ref_plan_buffer_line+0xce> @ imm = #0x8
     270: e7ff         	b	0x272 <ref_plan_buffer_line+0xc6> @ imm = #-0x2
     272: 9819         	ldr	r0, [sp, #0x64]
     274: 4240         	rsbs	r0, r0, #0
     276: 9010         	str	r0, [sp, #0x40]
     278: e002         	b	0x280 <ref_plan_buffer_line+0xd4> @ imm = #0x4
     27a: 9819         	ldr	r0, [sp, #0x64]
     27c: 9010         	str	r0, [sp, #0x40]
     27e: e7ff         	b	0x280 <ref_plan_buffer_line+0xd4> @ imm = #-0x2
     280: 9810         	ldr	r0, [sp, #0x40]
     282: 9928         	ldr	r1, [sp, #0xa0]
     284: f817 2c45    	ldrb	r2, [r7, #-69]
     288: f841 0022    	str.w	r0, [r1, r2, lsl #2]
     28c: 9928         	ldr	r1, [sp, #0xa0]
     28e: f817 0c45    	ldrb	r0, [r7, #-69]
     292: f851 0020    	ldr.w	r0, [r1, r0, lsl #2]
     296: 6909         	ldr	r1, [r1, #0x10]
     298: 4288         	cmp	r0, r1
     29a: d907         	bls	0x2ac <ref_plan_buffer_line+0x100> @ imm = #0xe
     29c: e7ff         	b	0x29e <ref_plan_buffer_line+0xf2> @ imm = #-0x2
     29e: 9928         	ldr	r1, [sp, #0xa0]
     2a0: f817 0c45    	ldrb	r0, [r7, #-69]
     2a4: f851 0020    	ldr.w	r0, [r1, r0, lsl #2]
     2a8: 6108         	str	r0, [r1, #0x10]
     2aa: e7ff         	b	0x2ac <ref_plan_buffer_line+0x100> @ imm = #-0x2
     2ac: 9819         	ldr	r0, [sp, #0x64]
     2ae: f7ff fffe    	bl	0x2ae <ref_plan_buffer_line+0x102> @ imm = #-0x4
			000002ae:  R_ARM_THM_CALL	__aeabi_i2f
     2b2: f817 2c45    	ldrb	r2, [r7, #-69]
     2b6: f240 0100    	movw	r1, #0x0
			000002b6:  R_ARM_THM_MOVW_ABS_NC	settings
     2ba: f2c0 0100    	movt	r1, #0x0
			000002ba:  R_ARM_THM_MOVT_ABS	settings
     2be: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
     2c2: f7ff fffe    	bl	0x2c2 <ref_plan_buffer_line+0x116> @ imm = #-0x4
			000002c2:  R_ARM_THM_CALL	__aeabi_fdiv
     2c6: 901b         	str	r0, [sp, #0x6c]
     2c8: 981b         	ldr	r0, [sp, #0x6c]
     2ca: f817 2c45    	ldrb	r2, [r7, #-69]
     2ce: a91c         	add	r1, sp, #0x70
     2d0: f841 0022    	str.w	r0, [r1, r2, lsl #2]
     2d4: 981b         	ldr	r0, [sp, #0x6c]
     2d6: 2100         	movs	r1, #0x0
     2d8: f7ff fffe    	bl	0x2d8 <ref_plan_buffer_line+0x12c> @ imm = #-0x4
			000002d8:  R_ARM_THM_CALL	__aeabi_fcmplt
     2dc: b150         	cbz	r0, 0x2f4 <ref_plan_buffer_line+0x148> @ imm = #0x14
     2de: e7ff         	b	0x2e0 <ref_plan_buffer_line+0x134> @ imm = #-0x2
     2e0: f817 0c45    	ldrb	r0, [r7, #-69]
     2e4: f000 f92c    	bl	0x540 <get_direction_pin_mask> @ imm = #0x258
     2e8: 4602         	mov	r2, r0
     2ea: 9928         	ldr	r1, [sp, #0xa0]
     2ec: 7d08         	ldrb	r0, [r1, #0x14]
     2ee: 4310         	orrs	r0, r2
     2f0: 7508         	strb	r0, [r1, #0x14]
     2f2: e7ff         	b	0x2f4 <ref_plan_buffer_line+0x148> @ imm = #-0x2
     2f4: e7ff         	b	0x2f6 <ref_plan_buffer_line+0x14a> @ imm = #-0x2
     2f6: f817 0c45    	ldrb	r0, [r7, #-69]
     2fa: 3001         	adds	r0, #0x1
     2fc: f807 0c45    	strb	r0, [r7, #-69]
     300: e78f         	b	0x222 <ref_plan_buffer_line+0x76> @ imm = #-0xe2
     302: 9828         	ldr	r0, [sp, #0xa0]
     304: 6900         	ldr	r0, [r0, #0x10]
     306: b920         	cbnz	r0, 0x312 <ref_plan_buffer_line+0x166> @ imm = #0x8
     308: e7ff         	b	0x30a <ref_plan_buffer_line+0x15e> @ imm = #-0x2
     30a: 2001         	movs	r0, #0x1
     30c: f807 0c01    	strb	r0, [r7, #-1]
     310: e112         	b	0x538 <ref_plan_buffer_line+0x38c> @ imm = #0x224
     312: a81c         	add	r0, sp, #0x70
     314: 900e         	str	r0, [sp, #0x38]
     316: f7ff fffe    	bl	0x316 <ref_plan_buffer_line+0x16a> @ imm = #-0x4
			00000316:  R_ARM_THM_CALL	ref_convert_delta_vector_to_unit_vector
     31a: 990e         	ldr	r1, [sp, #0x38]
     31c: 9a28         	ldr	r2, [sp, #0xa0]
     31e: 6290         	str	r0, [r2, #0x28]
     320: f240 0000    	movw	r0, #0x0
			00000320:  R_ARM_THM_MOVW_ABS_NC	settings
     324: f2c0 0000    	movt	r0, #0x0
			00000324:  R_ARM_THM_MOVT_ABS	settings
     328: 900f         	str	r0, [sp, #0x3c]
     32a: 3010         	adds	r0, #0x10
     32c: f7ff fffe    	bl	0x32c <ref_plan_buffer_line+0x180> @ imm = #-0x4
			0000032c:  R_ARM_THM_CALL	ref_limit_value_by_axis_maximum
     330: 990e         	ldr	r1, [sp, #0x38]
     332: 4602         	mov	r2, r0
     334: 980f         	ldr	r0, [sp, #0x3c]
     336: 9b28         	ldr	r3, [sp, #0xa0]
     338: 625a         	str	r2, [r3, #0x24]
     33a: 3020         	adds	r0, #0x20
     33c: f7ff fffe    	bl	0x33c <ref_plan_buffer_line+0x190> @ imm = #-0x4
			0000033c:  R_ARM_THM_CALL	ref_limit_value_by_axis_maximum
     340: 9928         	ldr	r1, [sp, #0xa0]
     342: 6308         	str	r0, [r1, #0x30]
     344: 9828         	ldr	r0, [sp, #0xa0]
     346: 7d40         	ldrb	r0, [r0, #0x15]
     348: 0780         	lsls	r0, r0, #0x1e
     34a: 2800         	cmp	r0, #0x0
     34c: d504         	bpl	0x358 <ref_plan_buffer_line+0x1ac> @ imm = #0x8
     34e: e7ff         	b	0x350 <ref_plan_buffer_line+0x1a4> @ imm = #-0x2
     350: 9928         	ldr	r1, [sp, #0xa0]
     352: 6b08         	ldr	r0, [r1, #0x30]
     354: 6348         	str	r0, [r1, #0x34]
     356: e013         	b	0x380 <ref_plan_buffer_line+0x1d4> @ imm = #0x26
     358: 9829         	ldr	r0, [sp, #0xa4]
     35a: 6840         	ldr	r0, [r0, #0x4]
     35c: 9928         	ldr	r1, [sp, #0xa0]
     35e: 6348         	str	r0, [r1, #0x34]
     360: 9828         	ldr	r0, [sp, #0xa0]
     362: 7d40         	ldrb	r0, [r0, #0x15]
     364: 0740         	lsls	r0, r0, #0x1d
     366: 2800         	cmp	r0, #0x0
     368: d509         	bpl	0x37e <ref_plan_buffer_line+0x1d2> @ imm = #0x12
     36a: e7ff         	b	0x36c <ref_plan_buffer_line+0x1c0> @ imm = #-0x2
     36c: 9828         	ldr	r0, [sp, #0xa0]
     36e: 900d         	str	r0, [sp, #0x34]
     370: 6a81         	ldr	r1, [r0, #0x28]
     372: 6b40         	ldr	r0, [r0, #0x34]
     374: f7ff fffe    	bl	0x374 <ref_plan_buffer_line+0x1c8> @ imm = #-0x4
			00000374:  R_ARM_THM_CALL	__aeabi_fmul
     378: 990d         	ldr	r1, [sp, #0x34]
     37a: 6348         	str	r0, [r1, #0x34]
     37c: e7ff         	b	0x37e <ref_plan_buffer_line+0x1d2> @ imm = #-0x2
     37e: e7ff         	b	0x380 <ref_plan_buffer_line+0x1d4> @ imm = #-0x2
     380: f240 0000    	movw	r0, #0x0
			00000380:  R_ARM_THM_MOVW_ABS_NC	block_buffer_head
     384: f2c0 0000    	movt	r0, #0x0
			00000384:  R_ARM_THM_MOVT_ABS	block_buffer_head
     388: 7800         	ldrb	r0, [r0]
     38a: f240 0100    	movw	r1, #0x0
			0000038a:  R_ARM_THM_MOVW_ABS_NC	block_buffer_tail
     38e: f2c0 0100    	movt	r1, #0x0
			0000038e:  R_ARM_THM_MOVT_ABS	block_buffer_tail
     392: 7809         	ldrb	r1, [r1]
     394: 4288         	cmp	r0, r1
     396: d005         	beq	0x3a4 <ref_plan_buffer_line+0x1f8> @ imm = #0xa
     398: e7ff         	b	0x39a <ref_plan_buffer_line+0x1ee> @ imm = #-0x2
     39a: 9828         	ldr	r0, [sp, #0xa0]
     39c: 7d40         	ldrb	r0, [r0, #0x15]
     39e: 07c0         	lsls	r0, r0, #0x1f
     3a0: b130         	cbz	r0, 0x3b0 <ref_plan_buffer_line+0x204> @ imm = #0xc
     3a2: e7ff         	b	0x3a4 <ref_plan_buffer_line+0x1f8> @ imm = #-0x2
     3a4: 9928         	ldr	r1, [sp, #0xa0]
     3a6: 2000         	movs	r0, #0x0
     3a8: 61c8         	str	r0, [r1, #0x1c]
     3aa: 9928         	ldr	r1, [sp, #0xa0]
     3ac: 62c8         	str	r0, [r1, #0x2c]
     3ae: e08b         	b	0x4c8 <ref_plan_buffer_line+0x31c> @ imm = #0x116
     3b0: 2000         	movs	r0, #0x0
     3b2: 9014         	str	r0, [sp, #0x50]
     3b4: f807 0c45    	strb	r0, [r7, #-69]
     3b8: e7ff         	b	0x3ba <ref_plan_buffer_line+0x20e> @ imm = #-0x2
     3ba: f817 0c45    	ldrb	r0, [r7, #-69]
     3be: 2803         	cmp	r0, #0x3
     3c0: dc2e         	bgt	0x420 <ref_plan_buffer_line+0x274> @ imm = #0x5c
     3c2: e7ff         	b	0x3c4 <ref_plan_buffer_line+0x218> @ imm = #-0x2
     3c4: f817 2c45    	ldrb	r2, [r7, #-69]
     3c8: f240 0000    	movw	r0, #0x0
			000003c8:  R_ARM_THM_MOVW_ABS_NC	pl
     3cc: f2c0 0000    	movt	r0, #0x0
			000003cc:  R_ARM_THM_MOVT_ABS	pl
     3d0: 3010         	adds	r0, #0x10
     3d2: 900a         	str	r0, [sp, #0x28]
     3d4: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
     3d8: a91c         	add	r1, sp, #0x70
     3da: 910b         	str	r1, [sp, #0x2c]
     3dc: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
     3e0: 9a14         	ldr	r2, [sp, #0x50]
     3e2: 9209         	str	r2, [sp, #0x24]
     3e4: f7ff fffe    	bl	0x3e4 <ref_plan_buffer_line+0x238> @ imm = #-0x4
			000003e4:  R_ARM_THM_CALL	__aeabi_fmul
     3e8: 4601         	mov	r1, r0
     3ea: 9809         	ldr	r0, [sp, #0x24]
     3ec: f7ff fffe    	bl	0x3ec <ref_plan_buffer_line+0x240> @ imm = #-0x4
			000003ec:  R_ARM_THM_CALL	__aeabi_fsub
     3f0: 990a         	ldr	r1, [sp, #0x28]
     3f2: 4602         	mov	r2, r0
     3f4: 980b         	ldr	r0, [sp, #0x2c]
     3f6: 9214         	str	r2, [sp, #0x50]
     3f8: f817 2c45    	ldrb	r2, [r7, #-69]
     3fc: 920c         	str	r2, [sp, #0x30]
     3fe: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
     402: f851 1022    	ldr.w	r1, [r1, r2, lsl #2]
     406: f7ff fffe    	bl	0x406 <ref_plan_buffer_line+0x25a> @ imm = #-0x4
			00000406:  R_ARM_THM_CALL	__aeabi_fsub
     40a: 9a0c         	ldr	r2, [sp, #0x30]
     40c: a915         	add	r1, sp, #0x54
     40e: f841 0022    	str.w	r0, [r1, r2, lsl #2]
     412: e7ff         	b	0x414 <ref_plan_buffer_line+0x268> @ imm = #-0x2
     414: f817 0c45    	ldrb	r0, [r7, #-69]
     418: 3001         	adds	r0, #0x1
     41a: f807 0c45    	strb	r0, [r7, #-69]
     41e: e7cc         	b	0x3ba <ref_plan_buffer_line+0x20e> @ imm = #-0x68
     420: 9814         	ldr	r0, [sp, #0x50]
     422: f64f 71ef    	movw	r1, #0xffef
     426: f6c3 717f    	movt	r1, #0x3f7f
     42a: f7ff fffe    	bl	0x42a <ref_plan_buffer_line+0x27e> @ imm = #-0x4
			0000042a:  R_ARM_THM_CALL	__aeabi_fcmpgt
     42e: b120         	cbz	r0, 0x43a <ref_plan_buffer_line+0x28e> @ imm = #0x8
     430: e7ff         	b	0x432 <ref_plan_buffer_line+0x286> @ imm = #-0x2
     432: 9928         	ldr	r1, [sp, #0xa0]
     434: 2000         	movs	r0, #0x0
     436: 62c8         	str	r0, [r1, #0x2c]
     438: e045         	b	0x4c6 <ref_plan_buffer_line+0x31a> @ imm = #0x8a
     43a: 9814         	ldr	r0, [sp, #0x50]
     43c: f64f 71ef    	movw	r1, #0xffef
     440: f6cb 717f    	movt	r1, #0xbf7f
     444: f7ff fffe    	bl	0x444 <ref_plan_buffer_line+0x298> @ imm = #-0x4
			00000444:  R_ARM_THM_CALL	__aeabi_fcmplt
     448: b138         	cbz	r0, 0x45a <ref_plan_buffer_line+0x2ae> @ imm = #0xe
     44a: e7ff         	b	0x44c <ref_plan_buffer_line+0x2a0> @ imm = #-0x2
     44c: 9928         	ldr	r1, [sp, #0xa0]
     44e: f64f 70ff    	movw	r0, #0xffff
     452: f6c7 707f    	movt	r0, #0x7f7f
     456: 62c8         	str	r0, [r1, #0x2c]
     458: e034         	b	0x4c4 <ref_plan_buffer_line+0x318> @ imm = #0x68
     45a: a815         	add	r0, sp, #0x54
     45c: 9004         	str	r0, [sp, #0x10]
     45e: f7ff fffe    	bl	0x45e <ref_plan_buffer_line+0x2b2> @ imm = #-0x4
			0000045e:  R_ARM_THM_CALL	ref_convert_delta_vector_to_unit_vector
     462: 9904         	ldr	r1, [sp, #0x10]
     464: f240 0000    	movw	r0, #0x0
			00000464:  R_ARM_THM_MOVW_ABS_NC	settings
     468: f2c0 0000    	movt	r0, #0x0
			00000468:  R_ARM_THM_MOVT_ABS	settings
     46c: 9005         	str	r0, [sp, #0x14]
     46e: 3010         	adds	r0, #0x10
     470: f7ff fffe    	bl	0x470 <ref_plan_buffer_line+0x2c4> @ imm = #-0x4
			00000470:  R_ARM_THM_CALL	ref_limit_value_by_axis_maximum
     474: 9013         	str	r0, [sp, #0x4c]
     476: 9914         	ldr	r1, [sp, #0x50]
     478: f04f 507e    	mov.w	r0, #0x3f800000
     47c: 9007         	str	r0, [sp, #0x1c]
     47e: f7ff fffe    	bl	0x47e <ref_plan_buffer_line+0x2d2> @ imm = #-0x4
			0000047e:  R_ARM_THM_CALL	__aeabi_fsub
     482: f04f 517c    	mov.w	r1, #0x3f000000
     486: f7ff fffe    	bl	0x486 <ref_plan_buffer_line+0x2da> @ imm = #-0x4
			00000486:  R_ARM_THM_CALL	__aeabi_fmul
     48a: f7ff fffe    	bl	0x48a <ref_plan_buffer_line+0x2de> @ imm = #-0x4
			0000048a:  R_ARM_THM_CALL	sqrtf
     48e: 9905         	ldr	r1, [sp, #0x14]
     490: 9012         	str	r0, [sp, #0x48]
     492: 9813         	ldr	r0, [sp, #0x4c]
     494: 6b09         	ldr	r1, [r1, #0x30]
     496: f7ff fffe    	bl	0x496 <ref_plan_buffer_line+0x2ea> @ imm = #-0x4
			00000496:  R_ARM_THM_CALL	__aeabi_fmul
     49a: 9912         	ldr	r1, [sp, #0x48]
     49c: 9106         	str	r1, [sp, #0x18]
     49e: f7ff fffe    	bl	0x49e <ref_plan_buffer_line+0x2f2> @ imm = #-0x4
			0000049e:  R_ARM_THM_CALL	__aeabi_fmul
     4a2: 9906         	ldr	r1, [sp, #0x18]
     4a4: 4602         	mov	r2, r0
     4a6: 9807         	ldr	r0, [sp, #0x1c]
     4a8: 9208         	str	r2, [sp, #0x20]
     4aa: f7ff fffe    	bl	0x4aa <ref_plan_buffer_line+0x2fe> @ imm = #-0x4
			000004aa:  R_ARM_THM_CALL	__aeabi_fsub
     4ae: 4601         	mov	r1, r0
     4b0: 9808         	ldr	r0, [sp, #0x20]
     4b2: f7ff fffe    	bl	0x4b2 <ref_plan_buffer_line+0x306> @ imm = #-0x4
			000004b2:  R_ARM_THM_CALL	__aeabi_fdiv
     4b6: 4601         	mov	r1, r0
     4b8: 2000         	movs	r0, #0x0
     4ba: f000 f84b    	bl	0x554 <f_max>           @ imm = #0x96
     4be: 9928         	ldr	r1, [sp, #0xa0]
     4c0: 62c8         	str	r0, [r1, #0x2c]
     4c2: e7ff         	b	0x4c4 <ref_plan_buffer_line+0x318> @ imm = #-0x2
     4c4: e7ff         	b	0x4c6 <ref_plan_buffer_line+0x31a> @ imm = #-0x2
     4c6: e7ff         	b	0x4c8 <ref_plan_buffer_line+0x31c> @ imm = #-0x2
     4c8: 9828         	ldr	r0, [sp, #0xa0]
     4ca: 7d40         	ldrb	r0, [r0, #0x15]
     4cc: 07c0         	lsls	r0, r0, #0x1f
     4ce: bb78         	cbnz	r0, 0x530 <ref_plan_buffer_line+0x384> @ imm = #0x5e
     4d0: e7ff         	b	0x4d2 <ref_plan_buffer_line+0x326> @ imm = #-0x2
     4d2: 9828         	ldr	r0, [sp, #0xa0]
     4d4: f7ff fffe    	bl	0x4d4 <ref_plan_buffer_line+0x328> @ imm = #-0x4
			000004d4:  R_ARM_THM_CALL	ref_plan_compute_profile_nominal_speed
     4d8: 9011         	str	r0, [sp, #0x44]
     4da: 9828         	ldr	r0, [sp, #0xa0]
     4dc: f240 0100    	movw	r1, #0x0
			000004dc:  R_ARM_THM_MOVW_ABS_NC	pl
     4e0: f2c0 0100    	movt	r1, #0x0
			000004e0:  R_ARM_THM_MOVT_ABS	pl
     4e4: 9102         	str	r1, [sp, #0x8]
     4e6: 6a0a         	ldr	r2, [r1, #0x20]
     4e8: 9911         	ldr	r1, [sp, #0x44]
     4ea: f7ff fffe    	bl	0x4ea <ref_plan_buffer_line+0x33e> @ imm = #-0x4
			000004ea:  R_ARM_THM_CALL	ref_plan_compute_profile_parameters
     4ee: 9802         	ldr	r0, [sp, #0x8]
     4f0: 9911         	ldr	r1, [sp, #0x44]
     4f2: 6201         	str	r1, [r0, #0x20]
     4f4: 3010         	adds	r0, #0x10
     4f6: a91c         	add	r1, sp, #0x70
     4f8: 2210         	movs	r2, #0x10
     4fa: 9201         	str	r2, [sp, #0x4]
     4fc: f7ff fffe    	bl	0x4fc <ref_plan_buffer_line+0x350> @ imm = #-0x4
			000004fc:  R_ARM_THM_CALL	memcpy
     500: 9a01         	ldr	r2, [sp, #0x4]
     502: 9802         	ldr	r0, [sp, #0x8]
     504: a924         	add	r1, sp, #0x90
     506: f7ff fffe    	bl	0x506 <ref_plan_buffer_line+0x35a> @ imm = #-0x4
			00000506:  R_ARM_THM_CALL	memcpy
     50a: f240 0000    	movw	r0, #0x0
			0000050a:  R_ARM_THM_MOVW_ABS_NC	next_buffer_head
     50e: f2c0 0000    	movt	r0, #0x0
			0000050e:  R_ARM_THM_MOVT_ABS	next_buffer_head
     512: 9003         	str	r0, [sp, #0xc]
     514: 7801         	ldrb	r1, [r0]
     516: f240 0000    	movw	r0, #0x0
			00000516:  R_ARM_THM_MOVW_ABS_NC	block_buffer_head
     51a: f2c0 0000    	movt	r0, #0x0
			0000051a:  R_ARM_THM_MOVT_ABS	block_buffer_head
     51e: 7001         	strb	r1, [r0]
     520: 7800         	ldrb	r0, [r0]
     522: f7ff fffe    	bl	0x522 <ref_plan_buffer_line+0x376> @ imm = #-0x4
			00000522:  R_ARM_THM_CALL	ref_plan_next_block_index
     526: 9903         	ldr	r1, [sp, #0xc]
     528: 7008         	strb	r0, [r1]
     52a: f7ff fffe    	bl	0x52a <ref_plan_buffer_line+0x37e> @ imm = #-0x4
			0000052a:  R_ARM_THM_CALL	ref_planner_recalculate
     52e: e7ff         	b	0x530 <ref_plan_buffer_line+0x384> @ imm = #-0x2
     530: 2000         	movs	r0, #0x0
     532: f807 0c01    	strb	r0, [r7, #-1]
     536: e7ff         	b	0x538 <ref_plan_buffer_line+0x38c> @ imm = #-0x2
     538: f817 0c01    	ldrb	r0, [r7, #-1]
     53c: b02c         	add	sp, #0xb0
     53e: bd80         	pop	{r7, pc}

00000540 <get_direction_pin_mask>:
     540: b081         	sub	sp, #0x4
     542: f88d 0003    	strb.w	r0, [sp, #0x3]
     546: f89d 1003    	ldrb.w	r1, [sp, #0x3]
     54a: 2001         	movs	r0, #0x1
     54c: 4088         	lsls	r0, r1
     54e: b2c0         	uxtb	r0, r0
     550: b001         	add	sp, #0x4
     552: 4770         	bx	lr

00000554 <f_max>:
     554: b580         	push	{r7, lr}
     556: 466f         	mov	r7, sp
     558: b084         	sub	sp, #0x10
     55a: 9003         	str	r0, [sp, #0xc]
     55c: 9102         	str	r1, [sp, #0x8]
     55e: 9803         	ldr	r0, [sp, #0xc]
     560: 9902         	ldr	r1, [sp, #0x8]
     562: f7ff fffe    	bl	0x562 <f_max+0xe>       @ imm = #-0x4
			00000562:  R_ARM_THM_CALL	__aeabi_fcmpgt
     566: b118         	cbz	r0, 0x570 <f_max+0x1c>  @ imm = #0x6
     568: e7ff         	b	0x56a <f_max+0x16>      @ imm = #-0x2
     56a: 9803         	ldr	r0, [sp, #0xc]
     56c: 9001         	str	r0, [sp, #0x4]
     56e: e002         	b	0x576 <f_max+0x22>      @ imm = #0x4
     570: 9802         	ldr	r0, [sp, #0x8]
     572: 9001         	str	r0, [sp, #0x4]
     574: e7ff         	b	0x576 <f_max+0x22>      @ imm = #-0x2
     576: 9801         	ldr	r0, [sp, #0x4]
     578: b004         	add	sp, #0x10
     57a: bd80         	pop	{r7, pc}

0000057c <ref_st_next_block_index>:
     57c: b081         	sub	sp, #0x4
     57e: f88d 0003    	strb.w	r0, [sp, #0x3]
     582: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     586: 3001         	adds	r0, #0x1
     588: f88d 0003    	strb.w	r0, [sp, #0x3]
     58c: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     590: 2809         	cmp	r0, #0x9
     592: d104         	bne	0x59e <ref_st_next_block_index+0x22> @ imm = #0x8
     594: e7ff         	b	0x596 <ref_st_next_block_index+0x1a> @ imm = #-0x2
     596: 2000         	movs	r0, #0x0
     598: f88d 0003    	strb.w	r0, [sp, #0x3]
     59c: e7ff         	b	0x59e <ref_st_next_block_index+0x22> @ imm = #-0x2
     59e: f89d 0003    	ldrb.w	r0, [sp, #0x3]
     5a2: b001         	add	sp, #0x4
     5a4: 4770         	bx	lr
     5a6: bf00         	nop

000005a8 <ref_st_prep_prefix>:
     5a8: b580         	push	{r7, lr}
     5aa: 466f         	mov	r7, sp
     5ac: b094         	sub	sp, #0x50
     5ae: f240 0000    	movw	r0, #0x0
			000005ae:  R_ARM_THM_MOVW_ABS_NC	sys
     5b2: f2c0 0000    	movt	r0, #0x0
			000005b2:  R_ARM_THM_MOVT_ABS	sys
     5b6: 7800         	ldrb	r0, [r0]
     5b8: 07c0         	lsls	r0, r0, #0x1f
     5ba: b108         	cbz	r0, 0x5c0 <ref_st_prep_prefix+0x18> @ imm = #0x2
     5bc: e7ff         	b	0x5be <ref_st_prep_prefix+0x16> @ imm = #-0x2
     5be: e166         	b	0x88e <ref_st_prep_prefix+0x2e6> @ imm = #0x2cc
     5c0: f240 0000    	movw	r0, #0x0
			000005c0:  R_ARM_THM_MOVW_ABS_NC	pl_block
     5c4: f2c0 0000    	movt	r0, #0x0
			000005c4:  R_ARM_THM_MOVT_ABS	pl_block
     5c8: 6800         	ldr	r0, [r0]
     5ca: 2800         	cmp	r0, #0x0
     5cc: f040 815f    	bne.w	0x88e <ref_st_prep_prefix+0x2e6> @ imm = #0x2be
     5d0: e7ff         	b	0x5d2 <ref_st_prep_prefix+0x2a> @ imm = #-0x2
     5d2: f240 0000    	movw	r0, #0x0
			000005d2:  R_ARM_THM_MOVW_ABS_NC	sys
     5d6: f2c0 0000    	movt	r0, #0x0
			000005d6:  R_ARM_THM_MOVT_ABS	sys
     5da: 7800         	ldrb	r0, [r0]
     5dc: 0740         	lsls	r0, r0, #0x1d
     5de: 2800         	cmp	r0, #0x0
     5e0: d508         	bpl	0x5f4 <ref_st_prep_prefix+0x4c> @ imm = #0x10
     5e2: e7ff         	b	0x5e4 <ref_st_prep_prefix+0x3c> @ imm = #-0x2
     5e4: f7ff fffe    	bl	0x5e4 <ref_st_prep_prefix+0x3c> @ imm = #-0x4
			000005e4:  R_ARM_THM_CALL	ref_plan_get_system_motion_block
     5e8: f240 0100    	movw	r1, #0x0
			000005e8:  R_ARM_THM_MOVW_ABS_NC	pl_block
     5ec: f2c0 0100    	movt	r1, #0x0
			000005ec:  R_ARM_THM_MOVT_ABS	pl_block
     5f0: 6008         	str	r0, [r1]
     5f2: e007         	b	0x604 <ref_st_prep_prefix+0x5c> @ imm = #0xe
     5f4: f7ff fffe    	bl	0x5f4 <ref_st_prep_prefix+0x4c> @ imm = #-0x4
			000005f4:  R_ARM_THM_CALL	ref_plan_get_current_block
     5f8: f240 0100    	movw	r1, #0x0
			000005f8:  R_ARM_THM_MOVW_ABS_NC	pl_block
     5fc: f2c0 0100    	movt	r1, #0x0
			000005fc:  R_ARM_THM_MOVT_ABS	pl_block
     600: 6008         	str	r0, [r1]
     602: e7ff         	b	0x604 <ref_st_prep_prefix+0x5c> @ imm = #-0x2
     604: f240 0000    	movw	r0, #0x0
			00000604:  R_ARM_THM_MOVW_ABS_NC	pl_block
     608: f2c0 0000    	movt	r0, #0x0
			00000608:  R_ARM_THM_MOVT_ABS	pl_block
     60c: 6800         	ldr	r0, [r0]
     60e: b908         	cbnz	r0, 0x614 <ref_st_prep_prefix+0x6c> @ imm = #0x2
     610: e7ff         	b	0x612 <ref_st_prep_prefix+0x6a> @ imm = #-0x2
     612: e13c         	b	0x88e <ref_st_prep_prefix+0x2e6> @ imm = #0x278
     614: f240 0000    	movw	r0, #0x0
			00000614:  R_ARM_THM_MOVW_ABS_NC	prep
     618: f2c0 0000    	movt	r0, #0x0
			00000618:  R_ARM_THM_MOVT_ABS	prep
     61c: 7840         	ldrb	r0, [r0, #0x1]
     61e: 07c0         	lsls	r0, r0, #0x1f
     620: b138         	cbz	r0, 0x632 <ref_st_prep_prefix+0x8a> @ imm = #0xe
     622: e7ff         	b	0x624 <ref_st_prep_prefix+0x7c> @ imm = #-0x2
     624: f240 0100    	movw	r1, #0x0
			00000624:  R_ARM_THM_MOVW_ABS_NC	prep
     628: f2c0 0100    	movt	r1, #0x0
			00000628:  R_ARM_THM_MOVT_ABS	prep
     62c: 2000         	movs	r0, #0x0
     62e: 7048         	strb	r0, [r1, #0x1]
     630: e06e         	b	0x710 <ref_st_prep_prefix+0x168> @ imm = #0xdc
     632: f240 0000    	movw	r0, #0x0
			00000632:  R_ARM_THM_MOVW_ABS_NC	prep
     636: f2c0 0000    	movt	r0, #0x0
			00000636:  R_ARM_THM_MOVT_ABS	prep
     63a: 900d         	str	r0, [sp, #0x34]
     63c: 7800         	ldrb	r0, [r0]
     63e: f7ff fffe    	bl	0x63e <ref_st_prep_prefix+0x96> @ imm = #-0x4
			0000063e:  R_ARM_THM_CALL	ref_st_next_block_index
     642: 4601         	mov	r1, r0
     644: 980d         	ldr	r0, [sp, #0x34]
     646: 7001         	strb	r1, [r0]
     648: 7800         	ldrb	r0, [r0]
     64a: eb00 0140    	add.w	r1, r0, r0, lsl #1
     64e: f240 0000    	movw	r0, #0x0
			0000064e:  R_ARM_THM_MOVW_ABS_NC	st_block_buffer
     652: f2c0 0000    	movt	r0, #0x0
			00000652:  R_ARM_THM_MOVT_ABS	st_block_buffer
     656: eb00 00c1    	add.w	r0, r0, r1, lsl #3
     65a: f240 0100    	movw	r1, #0x0
			0000065a:  R_ARM_THM_MOVW_ABS_NC	st_prep_block
     65e: f2c0 0100    	movt	r1, #0x0
			0000065e:  R_ARM_THM_MOVT_ABS	st_prep_block
     662: 6008         	str	r0, [r1]
     664: f240 0000    	movw	r0, #0x0
			00000664:  R_ARM_THM_MOVW_ABS_NC	pl_block
     668: f2c0 0000    	movt	r0, #0x0
			00000668:  R_ARM_THM_MOVT_ABS	pl_block
     66c: 6800         	ldr	r0, [r0]
     66e: 7d00         	ldrb	r0, [r0, #0x14]
     670: 6809         	ldr	r1, [r1]
     672: 7508         	strb	r0, [r1, #0x14]
     674: 2000         	movs	r0, #0x0
     676: f807 0c01    	strb	r0, [r7, #-1]
     67a: e7ff         	b	0x67c <ref_st_prep_prefix+0xd4> @ imm = #-0x2
     67c: f817 0c01    	ldrb	r0, [r7, #-1]
     680: 2803         	cmp	r0, #0x3
     682: dc18         	bgt	0x6b6 <ref_st_prep_prefix+0x10e> @ imm = #0x30
     684: e7ff         	b	0x686 <ref_st_prep_prefix+0xde> @ imm = #-0x2
     686: f240 0000    	movw	r0, #0x0
			00000686:  R_ARM_THM_MOVW_ABS_NC	pl_block
     68a: f2c0 0000    	movt	r0, #0x0
			0000068a:  R_ARM_THM_MOVT_ABS	pl_block
     68e: 6800         	ldr	r0, [r0]
     690: f817 2c01    	ldrb	r2, [r7, #-1]
     694: f850 0022    	ldr.w	r0, [r0, r2, lsl #2]
     698: 0200         	lsls	r0, r0, #0x8
     69a: f240 0100    	movw	r1, #0x0
			0000069a:  R_ARM_THM_MOVW_ABS_NC	st_prep_block
     69e: f2c0 0100    	movt	r1, #0x0
			0000069e:  R_ARM_THM_MOVT_ABS	st_prep_block
     6a2: 6809         	ldr	r1, [r1]
     6a4: f841 0022    	str.w	r0, [r1, r2, lsl #2]
     6a8: e7ff         	b	0x6aa <ref_st_prep_prefix+0x102> @ imm = #-0x2
     6aa: f817 0c01    	ldrb	r0, [r7, #-1]
     6ae: 3001         	adds	r0, #0x1
     6b0: f807 0c01    	strb	r0, [r7, #-1]
     6b4: e7e2         	b	0x67c <ref_st_prep_prefix+0xd4> @ imm = #-0x3c
     6b6: f240 0000    	movw	r0, #0x0
			000006b6:  R_ARM_THM_MOVW_ABS_NC	pl_block
     6ba: f2c0 0000    	movt	r0, #0x0
			000006ba:  R_ARM_THM_MOVT_ABS	pl_block
     6be: 900b         	str	r0, [sp, #0x2c]
     6c0: 6801         	ldr	r1, [r0]
     6c2: 6909         	ldr	r1, [r1, #0x10]
     6c4: 0209         	lsls	r1, r1, #0x8
     6c6: f240 0200    	movw	r2, #0x0
			000006c6:  R_ARM_THM_MOVW_ABS_NC	st_prep_block
     6ca: f2c0 0200    	movt	r2, #0x0
			000006ca:  R_ARM_THM_MOVT_ABS	st_prep_block
     6ce: 6812         	ldr	r2, [r2]
     6d0: 6111         	str	r1, [r2, #0x10]
     6d2: 6800         	ldr	r0, [r0]
     6d4: 6900         	ldr	r0, [r0, #0x10]
     6d6: f7ff fffe    	bl	0x6d6 <ref_st_prep_prefix+0x12e> @ imm = #-0x4
			000006d6:  R_ARM_THM_CALL	__aeabi_ui2f
     6da: 990b         	ldr	r1, [sp, #0x2c]
     6dc: 4602         	mov	r2, r0
     6de: f240 0000    	movw	r0, #0x0
			000006de:  R_ARM_THM_MOVW_ABS_NC	prep
     6e2: f2c0 0000    	movt	r0, #0x0
			000006e2:  R_ARM_THM_MOVT_ABS	prep
     6e6: 900c         	str	r0, [sp, #0x30]
     6e8: 6042         	str	r2, [r0, #0x4]
     6ea: 6840         	ldr	r0, [r0, #0x4]
     6ec: 6809         	ldr	r1, [r1]
     6ee: 6a89         	ldr	r1, [r1, #0x28]
     6f0: f7ff fffe    	bl	0x6f0 <ref_st_prep_prefix+0x148> @ imm = #-0x4
			000006f0:  R_ARM_THM_CALL	__aeabi_fdiv
     6f4: 4601         	mov	r1, r0
     6f6: 980c         	ldr	r0, [sp, #0x30]
     6f8: 6081         	str	r1, [r0, #0x8]
     6fa: 6881         	ldr	r1, [r0, #0x8]
     6fc: 2000         	movs	r0, #0x0
     6fe: f6c3 70a0    	movt	r0, #0x3fa0
     702: f7ff fffe    	bl	0x702 <ref_st_prep_prefix+0x15a> @ imm = #-0x4
			00000702:  R_ARM_THM_CALL	__aeabi_fdiv
     706: 990c         	ldr	r1, [sp, #0x30]
     708: 60c8         	str	r0, [r1, #0xc]
     70a: 2000         	movs	r0, #0x0
     70c: 6108         	str	r0, [r1, #0x10]
     70e: e7ff         	b	0x710 <ref_st_prep_prefix+0x168> @ imm = #-0x2
     710: f240 0000    	movw	r0, #0x0
			00000710:  R_ARM_THM_MOVW_ABS_NC	pl_block
     714: f2c0 0000    	movt	r0, #0x0
			00000714:  R_ARM_THM_MOVT_ABS	pl_block
     718: 900a         	str	r0, [sp, #0x28]
     71a: 6800         	ldr	r0, [r0]
     71c: 6a41         	ldr	r1, [r0, #0x24]
     71e: f04f 507c    	mov.w	r0, #0x3f000000
     722: 9008         	str	r0, [sp, #0x20]
     724: f7ff fffe    	bl	0x724 <ref_st_prep_prefix+0x17c> @ imm = #-0x4
			00000724:  R_ARM_THM_CALL	__aeabi_fdiv
     728: 9012         	str	r0, [sp, #0x48]
     72a: f240 0000    	movw	r0, #0x0
			0000072a:  R_ARM_THM_MOVW_ABS_NC	prep
     72e: f2c0 0000    	movt	r0, #0x0
			0000072e:  R_ARM_THM_MOVT_ABS	prep
     732: 9009         	str	r0, [sp, #0x24]
     734: 69c1         	ldr	r1, [r0, #0x1c]
     736: 4608         	mov	r0, r1
     738: f7ff fffe    	bl	0x738 <ref_st_prep_prefix+0x190> @ imm = #-0x4
			00000738:  R_ARM_THM_CALL	__aeabi_fmul
     73c: 4601         	mov	r1, r0
     73e: 980a         	ldr	r0, [sp, #0x28]
     740: 9111         	str	r1, [sp, #0x44]
     742: 6800         	ldr	r0, [r0]
     744: f7ff fffe    	bl	0x744 <ref_st_prep_prefix+0x19c> @ imm = #-0x4
			00000744:  R_ARM_THM_CALL	ref_plan_compute_profile_nominal_speed
     748: 9010         	str	r0, [sp, #0x40]
     74a: 9910         	ldr	r1, [sp, #0x40]
     74c: 4608         	mov	r0, r1
     74e: f7ff fffe    	bl	0x74e <ref_st_prep_prefix+0x1a6> @ imm = #-0x4
			0000074e:  R_ARM_THM_CALL	__aeabi_fmul
     752: 4601         	mov	r1, r0
     754: 980a         	ldr	r0, [sp, #0x28]
     756: 910f         	str	r1, [sp, #0x3c]
     758: 6801         	ldr	r1, [r0]
     75a: 69c8         	ldr	r0, [r1, #0x1c]
     75c: 6a89         	ldr	r1, [r1, #0x28]
     75e: 9107         	str	r1, [sp, #0x1c]
     760: 9912         	ldr	r1, [sp, #0x48]
     762: 9106         	str	r1, [sp, #0x18]
     764: 9911         	ldr	r1, [sp, #0x44]
     766: f7ff fffe    	bl	0x766 <ref_st_prep_prefix+0x1be> @ imm = #-0x4
			00000766:  R_ARM_THM_CALL	__aeabi_fsub
     76a: 4601         	mov	r1, r0
     76c: 9806         	ldr	r0, [sp, #0x18]
     76e: f7ff fffe    	bl	0x76e <ref_st_prep_prefix+0x1c6> @ imm = #-0x4
			0000076e:  R_ARM_THM_CALL	__aeabi_fmul
     772: 9907         	ldr	r1, [sp, #0x1c]
     774: f7ff fffe    	bl	0x774 <ref_st_prep_prefix+0x1cc> @ imm = #-0x4
			00000774:  R_ARM_THM_CALL	__aeabi_fadd
     778: 9908         	ldr	r1, [sp, #0x20]
     77a: f7ff fffe    	bl	0x77a <ref_st_prep_prefix+0x1d2> @ imm = #-0x4
			0000077a:  R_ARM_THM_CALL	__aeabi_fmul
     77e: 9a09         	ldr	r2, [sp, #0x24]
     780: 4601         	mov	r1, r0
     782: 980a         	ldr	r0, [sp, #0x28]
     784: 910e         	str	r1, [sp, #0x38]
     786: 6801         	ldr	r1, [r0]
     788: 6a89         	ldr	r1, [r1, #0x28]
     78a: 6211         	str	r1, [r2, #0x20]
     78c: 2100         	movs	r1, #0x0
     78e: 6251         	str	r1, [r2, #0x24]
     790: 6951         	ldr	r1, [r2, #0x14]
     792: 6191         	str	r1, [r2, #0x18]
     794: 6800         	ldr	r0, [r0]
     796: 69c0         	ldr	r0, [r0, #0x1c]
     798: 990f         	ldr	r1, [sp, #0x3c]
     79a: f7ff fffe    	bl	0x79a <ref_st_prep_prefix+0x1f2> @ imm = #-0x4
			0000079a:  R_ARM_THM_CALL	__aeabi_fcmpgt
     79e: b1d8         	cbz	r0, 0x7d8 <ref_st_prep_prefix+0x230> @ imm = #0x36
     7a0: e7ff         	b	0x7a2 <ref_st_prep_prefix+0x1fa> @ imm = #-0x2
     7a2: f240 0000    	movw	r0, #0x0
			000007a2:  R_ARM_THM_MOVW_ABS_NC	pl_block
     7a6: f2c0 0000    	movt	r0, #0x0
			000007a6:  R_ARM_THM_MOVT_ABS	pl_block
     7aa: 6801         	ldr	r1, [r0]
     7ac: 69c8         	ldr	r0, [r1, #0x1c]
     7ae: 6a89         	ldr	r1, [r1, #0x28]
     7b0: 9105         	str	r1, [sp, #0x14]
     7b2: 9912         	ldr	r1, [sp, #0x48]
     7b4: 9104         	str	r1, [sp, #0x10]
     7b6: 990f         	ldr	r1, [sp, #0x3c]
     7b8: f7ff fffe    	bl	0x7b8 <ref_st_prep_prefix+0x210> @ imm = #-0x4
			000007b8:  R_ARM_THM_CALL	__aeabi_fsub
     7bc: 4601         	mov	r1, r0
     7be: 9804         	ldr	r0, [sp, #0x10]
     7c0: f7ff fffe    	bl	0x7c0 <ref_st_prep_prefix+0x218> @ imm = #-0x4
			000007c0:  R_ARM_THM_CALL	__aeabi_fmul
     7c4: 4601         	mov	r1, r0
     7c6: 9805         	ldr	r0, [sp, #0x14]
     7c8: f7ff fffe    	bl	0x7c8 <ref_st_prep_prefix+0x220> @ imm = #-0x4
			000007c8:  R_ARM_THM_CALL	__aeabi_fsub
     7cc: f240 0100    	movw	r1, #0x0
			000007cc:  R_ARM_THM_MOVW_ABS_NC	prep
     7d0: f2c0 0100    	movt	r1, #0x0
			000007d0:  R_ARM_THM_MOVT_ABS	prep
     7d4: 6208         	str	r0, [r1, #0x20]
     7d6: e059         	b	0x88c <ref_st_prep_prefix+0x2e4> @ imm = #0xb2
     7d8: 980e         	ldr	r0, [sp, #0x38]
     7da: 2100         	movs	r1, #0x0
     7dc: f7ff fffe    	bl	0x7dc <ref_st_prep_prefix+0x234> @ imm = #-0x4
			000007dc:  R_ARM_THM_CALL	__aeabi_fcmpgt
     7e0: 2800         	cmp	r0, #0x0
     7e2: d049         	beq	0x878 <ref_st_prep_prefix+0x2d0> @ imm = #0x92
     7e4: e7ff         	b	0x7e6 <ref_st_prep_prefix+0x23e> @ imm = #-0x2
     7e6: 980e         	ldr	r0, [sp, #0x38]
     7e8: f240 0100    	movw	r1, #0x0
			000007e8:  R_ARM_THM_MOVW_ABS_NC	pl_block
     7ec: f2c0 0100    	movt	r1, #0x0
			000007ec:  R_ARM_THM_MOVT_ABS	pl_block
     7f0: 6809         	ldr	r1, [r1]
     7f2: 6a89         	ldr	r1, [r1, #0x28]
     7f4: f7ff fffe    	bl	0x7f4 <ref_st_prep_prefix+0x24c> @ imm = #-0x4
			000007f4:  R_ARM_THM_CALL	__aeabi_fcmplt
     7f8: b3e8         	cbz	r0, 0x876 <ref_st_prep_prefix+0x2ce> @ imm = #0x7a
     7fa: e7ff         	b	0x7fc <ref_st_prep_prefix+0x254> @ imm = #-0x2
     7fc: 9812         	ldr	r0, [sp, #0x48]
     7fe: 9003         	str	r0, [sp, #0xc]
     800: 980f         	ldr	r0, [sp, #0x3c]
     802: 9911         	ldr	r1, [sp, #0x44]
     804: f7ff fffe    	bl	0x804 <ref_st_prep_prefix+0x25c> @ imm = #-0x4
			00000804:  R_ARM_THM_CALL	__aeabi_fsub
     808: 4601         	mov	r1, r0
     80a: 9803         	ldr	r0, [sp, #0xc]
     80c: f7ff fffe    	bl	0x80c <ref_st_prep_prefix+0x264> @ imm = #-0x4
			0000080c:  R_ARM_THM_CALL	__aeabi_fmul
     810: 4601         	mov	r1, r0
     812: f240 0000    	movw	r0, #0x0
			00000812:  R_ARM_THM_MOVW_ABS_NC	prep
     816: f2c0 0000    	movt	r0, #0x0
			00000816:  R_ARM_THM_MOVT_ABS	prep
     81a: 6241         	str	r1, [r0, #0x24]
     81c: 6a40         	ldr	r0, [r0, #0x24]
     81e: 990e         	ldr	r1, [sp, #0x38]
     820: f7ff fffe    	bl	0x820 <ref_st_prep_prefix+0x278> @ imm = #-0x4
			00000820:  R_ARM_THM_CALL	__aeabi_fcmplt
     824: b138         	cbz	r0, 0x836 <ref_st_prep_prefix+0x28e> @ imm = #0xe
     826: e7ff         	b	0x828 <ref_st_prep_prefix+0x280> @ imm = #-0x2
     828: 9810         	ldr	r0, [sp, #0x40]
     82a: f240 0100    	movw	r1, #0x0
			0000082a:  R_ARM_THM_MOVW_ABS_NC	prep
     82e: f2c0 0100    	movt	r1, #0x0
			0000082e:  R_ARM_THM_MOVT_ABS	prep
     832: 6188         	str	r0, [r1, #0x18]
     834: e01e         	b	0x874 <ref_st_prep_prefix+0x2cc> @ imm = #0x3c
     836: 980e         	ldr	r0, [sp, #0x38]
     838: f240 0100    	movw	r1, #0x0
			00000838:  R_ARM_THM_MOVW_ABS_NC	prep
     83c: f2c0 0100    	movt	r1, #0x0
			0000083c:  R_ARM_THM_MOVT_ABS	prep
     840: 9102         	str	r1, [sp, #0x8]
     842: 6208         	str	r0, [r1, #0x20]
     844: 980e         	ldr	r0, [sp, #0x38]
     846: 6248         	str	r0, [r1, #0x24]
     848: f240 0000    	movw	r0, #0x0
			00000848:  R_ARM_THM_MOVW_ABS_NC	pl_block
     84c: f2c0 0000    	movt	r0, #0x0
			0000084c:  R_ARM_THM_MOVT_ABS	pl_block
     850: 6800         	ldr	r0, [r0]
     852: 6a41         	ldr	r1, [r0, #0x24]
     854: 4608         	mov	r0, r1
     856: f7ff fffe    	bl	0x856 <ref_st_prep_prefix+0x2ae> @ imm = #-0x4
			00000856:  R_ARM_THM_CALL	__aeabi_fadd
     85a: 990e         	ldr	r1, [sp, #0x38]
     85c: 9a11         	ldr	r2, [sp, #0x44]
     85e: 9201         	str	r2, [sp, #0x4]
     860: f7ff fffe    	bl	0x860 <ref_st_prep_prefix+0x2b8> @ imm = #-0x4
			00000860:  R_ARM_THM_CALL	__aeabi_fmul
     864: 9901         	ldr	r1, [sp, #0x4]
     866: f7ff fffe    	bl	0x866 <ref_st_prep_prefix+0x2be> @ imm = #-0x4
			00000866:  R_ARM_THM_CALL	__aeabi_fadd
     86a: f7ff fffe    	bl	0x86a <ref_st_prep_prefix+0x2c2> @ imm = #-0x4
			0000086a:  R_ARM_THM_CALL	sqrtf
     86e: 9902         	ldr	r1, [sp, #0x8]
     870: 6188         	str	r0, [r1, #0x18]
     872: e7ff         	b	0x874 <ref_st_prep_prefix+0x2cc> @ imm = #-0x2
     874: e7ff         	b	0x876 <ref_st_prep_prefix+0x2ce> @ imm = #-0x2
     876: e008         	b	0x88a <ref_st_prep_prefix+0x2e2> @ imm = #0x10
     878: f240 0100    	movw	r1, #0x0
			00000878:  R_ARM_THM_MOVW_ABS_NC	prep
     87c: f2c0 0100    	movt	r1, #0x0
			0000087c:  R_ARM_THM_MOVT_ABS	prep
     880: 2000         	movs	r0, #0x0
     882: 6208         	str	r0, [r1, #0x20]
     884: 69c8         	ldr	r0, [r1, #0x1c]
     886: 6188         	str	r0, [r1, #0x18]
     888: e7ff         	b	0x88a <ref_st_prep_prefix+0x2e2> @ imm = #-0x2
     88a: e7ff         	b	0x88c <ref_st_prep_prefix+0x2e4> @ imm = #-0x2
     88c: e7ff         	b	0x88e <ref_st_prep_prefix+0x2e6> @ imm = #-0x2
     88e: b014         	add	sp, #0x50
     890: bd80         	pop	{r7, pc}
     892: bf00         	nop

00000894 <ref_gc_import_core>:
     894: b580         	push	{r7, lr}
     896: 466f         	mov	r7, sp
     898: b090         	sub	sp, #0x40
     89a: 900e         	str	r0, [sp, #0x38]
     89c: f240 0000    	movw	r0, #0x0
			0000089c:  R_ARM_THM_MOVW_ABS_NC	gc_block_ref
     8a0: f2c0 0000    	movt	r0, #0x0
			000008a0:  R_ARM_THM_MOVT_ABS	gc_block_ref
     8a4: 9005         	str	r0, [sp, #0x14]
     8a6: 2100         	movs	r1, #0x0
     8a8: 9106         	str	r1, [sp, #0x18]
     8aa: 2248         	movs	r2, #0x48
     8ac: f7ff fffe    	bl	0x8ac <ref_gc_import_core+0x18> @ imm = #-0x4
			000008ac:  R_ARM_THM_CALL	memset
     8b0: 9805         	ldr	r0, [sp, #0x14]
     8b2: f240 0100    	movw	r1, #0x0
			000008b2:  R_ARM_THM_MOVW_ABS_NC	gc_state_ref
     8b6: f2c0 0100    	movt	r1, #0x0
			000008b6:  R_ARM_THM_MOVT_ABS	gc_state_ref
     8ba: 2209         	movs	r2, #0x9
     8bc: f7ff fffe    	bl	0x8bc <ref_gc_import_core+0x28> @ imm = #-0x4
			000008bc:  R_ARM_THM_CALL	memcpy
     8c0: 9806         	ldr	r0, [sp, #0x18]
     8c2: f807 0c09    	strb	r0, [r7, #-9]
     8c6: f807 0c0a    	strb	r0, [r7, #-10]
     8ca: f807 0c0b    	strb	r0, [r7, #-11]
     8ce: f827 0c0e    	strh	r0, [r7, #-14]
     8d2: f8ad 0030    	strh.w	r0, [sp, #0x30]
     8d6: f807 0c11    	strb	r0, [r7, #-17]
     8da: 980e         	ldr	r0, [sp, #0x38]
     8dc: 7800         	ldrb	r0, [r0]
     8de: 2824         	cmp	r0, #0x24
     8e0: d10f         	bne	0x902 <ref_gc_import_core+0x6e> @ imm = #0x1e
     8e2: e7ff         	b	0x8e4 <ref_gc_import_core+0x50> @ imm = #-0x2
     8e4: f817 0c11    	ldrb	r0, [r7, #-17]
     8e8: f040 0001    	orr	r0, r0, #0x1
     8ec: f807 0c11    	strb	r0, [r7, #-17]
     8f0: f240 0100    	movw	r1, #0x0
			000008f0:  R_ARM_THM_MOVW_ABS_NC	gc_block_ref
     8f4: f2c0 0100    	movt	r1, #0x0
			000008f4:  R_ARM_THM_MOVT_ABS	gc_block_ref
     8f8: 2001         	movs	r0, #0x1
     8fa: 7008         	strb	r0, [r1]
     8fc: 2000         	movs	r0, #0x0
     8fe: 7048         	strb	r0, [r1, #0x1]
     900: e7ff         	b	0x902 <ref_gc_import_core+0x6e> @ imm = #-0x2
     902: f817 0c11    	ldrb	r0, [r7, #-17]
     906: f000 0001    	and	r0, r0, #0x1
     90a: 2800         	cmp	r0, #0x0
     90c: bf18         	it	ne
     90e: 2003         	movne	r0, #0x3
     910: f807 0c12    	strb	r0, [r7, #-18]
     914: e7ff         	b	0x916 <ref_gc_import_core+0x82> @ imm = #-0x2
     916: 980e         	ldr	r0, [sp, #0x38]
     918: f817 1c12    	ldrb	r1, [r7, #-18]
     91c: 5c40         	ldrb	r0, [r0, r1]
     91e: 2800         	cmp	r0, #0x0
     920: f000 8154    	beq.w	0xbcc <ref_gc_import_core+0x338> @ imm = #0x2a8
     924: e7ff         	b	0x926 <ref_gc_import_core+0x92> @ imm = #-0x2
     926: 980e         	ldr	r0, [sp, #0x38]
     928: f817 1c12    	ldrb	r1, [r7, #-18]
     92c: 5c40         	ldrb	r0, [r0, r1]
     92e: f807 0c13    	strb	r0, [r7, #-19]
     932: f817 0c13    	ldrb	r0, [r7, #-19]
     936: 2841         	cmp	r0, #0x41
     938: db05         	blt	0x946 <ref_gc_import_core+0xb2> @ imm = #0xa
     93a: e7ff         	b	0x93c <ref_gc_import_core+0xa8> @ imm = #-0x2
     93c: f817 0c13    	ldrb	r0, [r7, #-19]
     940: 285b         	cmp	r0, #0x5b
     942: db04         	blt	0x94e <ref_gc_import_core+0xba> @ imm = #0x8
     944: e7ff         	b	0x946 <ref_gc_import_core+0xb2> @ imm = #-0x2
     946: 2001         	movs	r0, #0x1
     948: f807 0c01    	strb	r0, [r7, #-1]
     94c: e155         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0x2aa
     94e: f817 0c12    	ldrb	r0, [r7, #-18]
     952: 3001         	adds	r0, #0x1
     954: f807 0c12    	strb	r0, [r7, #-18]
     958: 980e         	ldr	r0, [sp, #0x38]
     95a: f1a7 0112    	sub.w	r1, r7, #0x12
     95e: aa0a         	add	r2, sp, #0x28
     960: f7ff fffe    	bl	0x960 <ref_gc_import_core+0xcc> @ imm = #-0x4
			00000960:  R_ARM_THM_CALL	read_float
     964: b920         	cbnz	r0, 0x970 <ref_gc_import_core+0xdc> @ imm = #0x8
     966: e7ff         	b	0x968 <ref_gc_import_core+0xd4> @ imm = #-0x2
     968: 2002         	movs	r0, #0x2
     96a: f807 0c01    	strb	r0, [r7, #-1]
     96e: e144         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0x288
     970: 980a         	ldr	r0, [sp, #0x28]
     972: f7ff fffe    	bl	0x972 <ref_gc_import_core+0xde> @ imm = #-0x4
			00000972:  R_ARM_THM_CALL	__aeabi_f2iz
     976: f807 0c19    	strb	r0, [r7, #-25]
     97a: 980a         	ldr	r0, [sp, #0x28]
     97c: 9004         	str	r0, [sp, #0x10]
     97e: f817 0c19    	ldrb	r0, [r7, #-25]
     982: f7ff fffe    	bl	0x982 <ref_gc_import_core+0xee> @ imm = #-0x4
			00000982:  R_ARM_THM_CALL	__aeabi_ui2f
     986: 4601         	mov	r1, r0
     988: 9804         	ldr	r0, [sp, #0x10]
     98a: f7ff fffe    	bl	0x98a <ref_gc_import_core+0xf6> @ imm = #-0x4
			0000098a:  R_ARM_THM_CALL	__aeabi_fsub
     98e: 2100         	movs	r1, #0x0
     990: f2c4 21c8    	movt	r1, #0x42c8
     994: f7ff fffe    	bl	0x994 <ref_gc_import_core+0x100> @ imm = #-0x4
			00000994:  R_ARM_THM_CALL	__aeabi_fmul
     998: f04f 517c    	mov.w	r1, #0x3f000000
     99c: f7ff fffe    	bl	0x99c <ref_gc_import_core+0x108> @ imm = #-0x4
			0000099c:  R_ARM_THM_CALL	__aeabi_fadd
     9a0: f7ff fffe    	bl	0x9a0 <ref_gc_import_core+0x10c> @ imm = #-0x4
			000009a0:  R_ARM_THM_CALL	__aeabi_f2iz
     9a4: f8ad 0024    	strh.w	r0, [sp, #0x24]
     9a8: f817 0c13    	ldrb	r0, [r7, #-19]
     9ac: 2847         	cmp	r0, #0x47
     9ae: f040 8086    	bne.w	0xabe <ref_gc_import_core+0x22a> @ imm = #0x10c
     9b2: e7ff         	b	0x9b4 <ref_gc_import_core+0x120> @ imm = #-0x2
     9b4: 2000         	movs	r0, #0x0
     9b6: f827 0c1e    	strh	r0, [r7, #-30]
     9ba: f817 0c19    	ldrb	r0, [r7, #-25]
     9be: 4601         	mov	r1, r0
     9c0: 9103         	str	r1, [sp, #0xc]
     9c2: 285e         	cmp	r0, #0x5e
     9c4: f200 805d    	bhi.w	0xa82 <ref_gc_import_core+0x1ee> @ imm = #0xba
     9c8: 9903         	ldr	r1, [sp, #0xc]
     9ca: e8df f001    	tbb	[pc, r1]
     9ce: 34 34 34 34  	.word	0x34343434
     9d2: 30 5a 5a 5a  	.word	0x5a5a5a30
     9d6: 5a 5a 30 5a  	.word	0x5a305a5a
     9da: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     9de: 5a 38 38 38  	.word	0x3838385a
     9e2: 44 44 5a 5a  	.word	0x5a5a4444
     9e6: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     9ea: 30 5a 30 5a  	.word	0x5a305a30
     9ee: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     9f2: 5a 5a 34 5a  	.word	0x5a345a5a
     9f6: 48 5a 5a 4c  	.word	0x4c5a5a48
     9fa: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     9fe: 5a 4c 5a 5a  	.word	0x5a5a4c5a
     a02: 5a 30 50 50  	.word	0x5050305a
     a06: 50 50 50 50  	.word	0x50505050
     a0a: 5a 55 5a 5a  	.word	0x5a5a555a
     a0e: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     a12: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     a16: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     a1a: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     a1e: 34 5a 5a 5a  	.word	0x5a5a5a34
     a22: 5a 5a 5a 5a  	.word	0x5a5a5a5a
     a26: 5a 5a 3c 3c  	.word	0x3c3c5a5a
     a2a: 30 40 40 00  	.word	0x00404030
     a2e: 2001         	movs	r0, #0x1
     a30: f827 0c1e    	strh	r0, [r7, #-30]
     a34: e029         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x52
     a36: 2002         	movs	r0, #0x2
     a38: f827 0c1e    	strh	r0, [r7, #-30]
     a3c: e025         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x4a
     a3e: 2004         	movs	r0, #0x4
     a40: f827 0c1e    	strh	r0, [r7, #-30]
     a44: e021         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x42
     a46: 2008         	movs	r0, #0x8
     a48: f827 0c1e    	strh	r0, [r7, #-30]
     a4c: e01d         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x3a
     a4e: 2010         	movs	r0, #0x10
     a50: f827 0c1e    	strh	r0, [r7, #-30]
     a54: e019         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x32
     a56: 2020         	movs	r0, #0x20
     a58: f827 0c1e    	strh	r0, [r7, #-30]
     a5c: e015         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x2a
     a5e: 2040         	movs	r0, #0x40
     a60: f827 0c1e    	strh	r0, [r7, #-30]
     a64: e011         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x22
     a66: 2080         	movs	r0, #0x80
     a68: f827 0c1e    	strh	r0, [r7, #-30]
     a6c: e00d         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x1a
     a6e: f44f 7080    	mov.w	r0, #0x100
     a72: f827 0c1e    	strh	r0, [r7, #-30]
     a76: e008         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x10
     a78: f44f 7000    	mov.w	r0, #0x200
     a7c: f827 0c1e    	strh	r0, [r7, #-30]
     a80: e003         	b	0xa8a <ref_gc_import_core+0x1f6> @ imm = #0x6
     a82: 2003         	movs	r0, #0x3
     a84: f807 0c01    	strb	r0, [r7, #-1]
     a88: e0b7         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0x16e
     a8a: f837 0c0e    	ldrh	r0, [r7, #-14]
     a8e: f837 1c1e    	ldrh	r1, [r7, #-30]
     a92: 4208         	tst	r0, r1
     a94: d004         	beq	0xaa0 <ref_gc_import_core+0x20c> @ imm = #0x8
     a96: e7ff         	b	0xa98 <ref_gc_import_core+0x204> @ imm = #-0x2
     a98: 2004         	movs	r0, #0x4
     a9a: f807 0c01    	strb	r0, [r7, #-1]
     a9e: e0ac         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0x158
     aa0: f837 1c1e    	ldrh	r1, [r7, #-30]
     aa4: f837 0c0e    	ldrh	r0, [r7, #-14]
     aa8: 4308         	orrs	r0, r1
     aaa: f827 0c0e    	strh	r0, [r7, #-14]
     aae: f8bd 1024    	ldrh.w	r1, [sp, #0x24]
     ab2: f8bd 0030    	ldrh.w	r0, [sp, #0x30]
     ab6: 4048         	eors	r0, r1
     ab8: f8ad 0030    	strh.w	r0, [sp, #0x30]
     abc: e085         	b	0xbca <ref_gc_import_core+0x336> @ imm = #0x10a
     abe: f817 0c13    	ldrb	r0, [r7, #-19]
     ac2: 284d         	cmp	r0, #0x4d
     ac4: d13b         	bne	0xb3e <ref_gc_import_core+0x2aa> @ imm = #0x76
     ac6: e7ff         	b	0xac8 <ref_gc_import_core+0x234> @ imm = #-0x2
     ac8: f817 0c19    	ldrb	r0, [r7, #-25]
     acc: 4601         	mov	r1, r0
     ace: 9102         	str	r1, [sp, #0x8]
     ad0: 2803         	cmp	r0, #0x3
     ad2: d30e         	blo	0xaf2 <ref_gc_import_core+0x25e> @ imm = #0x1c
     ad4: e7ff         	b	0xad6 <ref_gc_import_core+0x242> @ imm = #-0x2
     ad6: 9802         	ldr	r0, [sp, #0x8]
     ad8: 3803         	subs	r0, #0x3
     ada: 2803         	cmp	r0, #0x3
     adc: d30e         	blo	0xafc <ref_gc_import_core+0x268> @ imm = #0x1c
     ade: e7ff         	b	0xae0 <ref_gc_import_core+0x24c> @ imm = #-0x2
     ae0: 9802         	ldr	r0, [sp, #0x8]
     ae2: 3808         	subs	r0, #0x8
     ae4: 2802         	cmp	r0, #0x2
     ae6: d30e         	blo	0xb06 <ref_gc_import_core+0x272> @ imm = #0x1c
     ae8: e7ff         	b	0xaea <ref_gc_import_core+0x256> @ imm = #-0x2
     aea: 9802         	ldr	r0, [sp, #0x8]
     aec: 281e         	cmp	r0, #0x1e
     aee: d10f         	bne	0xb10 <ref_gc_import_core+0x27c> @ imm = #0x1e
     af0: e7ff         	b	0xaf2 <ref_gc_import_core+0x25e> @ imm = #-0x2
     af2: f44f 6080    	mov.w	r0, #0x400
     af6: f8ad 0020    	strh.w	r0, [sp, #0x20]
     afa: e00d         	b	0xb18 <ref_gc_import_core+0x284> @ imm = #0x1a
     afc: f44f 6000    	mov.w	r0, #0x800
     b00: f8ad 0020    	strh.w	r0, [sp, #0x20]
     b04: e008         	b	0xb18 <ref_gc_import_core+0x284> @ imm = #0x10
     b06: f44f 5080    	mov.w	r0, #0x1000
     b0a: f8ad 0020    	strh.w	r0, [sp, #0x20]
     b0e: e003         	b	0xb18 <ref_gc_import_core+0x284> @ imm = #0x6
     b10: 2005         	movs	r0, #0x5
     b12: f807 0c01    	strb	r0, [r7, #-1]
     b16: e070         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0xe0
     b18: f837 0c0e    	ldrh	r0, [r7, #-14]
     b1c: f8bd 1020    	ldrh.w	r1, [sp, #0x20]
     b20: 4208         	tst	r0, r1
     b22: d004         	beq	0xb2e <ref_gc_import_core+0x29a> @ imm = #0x8
     b24: e7ff         	b	0xb26 <ref_gc_import_core+0x292> @ imm = #-0x2
     b26: 2004         	movs	r0, #0x4
     b28: f807 0c01    	strb	r0, [r7, #-1]
     b2c: e065         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #0xca
     b2e: f8bd 1020    	ldrh.w	r1, [sp, #0x20]
     b32: f837 0c0e    	ldrh	r0, [r7, #-14]
     b36: 4308         	orrs	r0, r1
     b38: f827 0c0e    	strh	r0, [r7, #-14]
     b3c: e044         	b	0xbc8 <ref_gc_import_core+0x334> @ imm = #0x88
     b3e: f817 0c13    	ldrb	r0, [r7, #-19]
     b42: f000 0107    	and	r1, r0, #0x7
     b46: 2001         	movs	r0, #0x1
     b48: 4088         	lsls	r0, r1
     b4a: f807 0c21    	strb	r0, [r7, #-33]
     b4e: f817 0c13    	ldrb	r0, [r7, #-19]
     b52: 2858         	cmp	r0, #0x58
     b54: d00f         	beq	0xb76 <ref_gc_import_core+0x2e2> @ imm = #0x1e
     b56: e7ff         	b	0xb58 <ref_gc_import_core+0x2c4> @ imm = #-0x2
     b58: f817 0c13    	ldrb	r0, [r7, #-19]
     b5c: 2859         	cmp	r0, #0x59
     b5e: d00a         	beq	0xb76 <ref_gc_import_core+0x2e2> @ imm = #0x14
     b60: e7ff         	b	0xb62 <ref_gc_import_core+0x2ce> @ imm = #-0x2
     b62: f817 0c13    	ldrb	r0, [r7, #-19]
     b66: 285a         	cmp	r0, #0x5a
     b68: d005         	beq	0xb76 <ref_gc_import_core+0x2e2> @ imm = #0xa
     b6a: e7ff         	b	0xb6c <ref_gc_import_core+0x2d8> @ imm = #-0x2
     b6c: f817 0c13    	ldrb	r0, [r7, #-19]
     b70: 2841         	cmp	r0, #0x41
     b72: d108         	bne	0xb86 <ref_gc_import_core+0x2f2> @ imm = #0x10
     b74: e7ff         	b	0xb76 <ref_gc_import_core+0x2e2> @ imm = #-0x2
     b76: f817 1c21    	ldrb	r1, [r7, #-33]
     b7a: f817 0c0a    	ldrb	r0, [r7, #-10]
     b7e: 4308         	orrs	r0, r1
     b80: f807 0c0a    	strb	r0, [r7, #-10]
     b84: e01f         	b	0xbc6 <ref_gc_import_core+0x332> @ imm = #0x3e
     b86: f817 0c13    	ldrb	r0, [r7, #-19]
     b8a: 2849         	cmp	r0, #0x49
     b8c: d00a         	beq	0xba4 <ref_gc_import_core+0x310> @ imm = #0x14
     b8e: e7ff         	b	0xb90 <ref_gc_import_core+0x2fc> @ imm = #-0x2
     b90: f817 0c13    	ldrb	r0, [r7, #-19]
     b94: 284a         	cmp	r0, #0x4a
     b96: d005         	beq	0xba4 <ref_gc_import_core+0x310> @ imm = #0xa
     b98: e7ff         	b	0xb9a <ref_gc_import_core+0x306> @ imm = #-0x2
     b9a: f817 0c13    	ldrb	r0, [r7, #-19]
     b9e: 284b         	cmp	r0, #0x4b
     ba0: d108         	bne	0xbb4 <ref_gc_import_core+0x320> @ imm = #0x10
     ba2: e7ff         	b	0xba4 <ref_gc_import_core+0x310> @ imm = #-0x2
     ba4: f817 1c21    	ldrb	r1, [r7, #-33]
     ba8: f817 0c0b    	ldrb	r0, [r7, #-11]
     bac: 4308         	orrs	r0, r1
     bae: f807 0c0b    	strb	r0, [r7, #-11]
     bb2: e007         	b	0xbc4 <ref_gc_import_core+0x330> @ imm = #0xe
     bb4: f817 1c21    	ldrb	r1, [r7, #-33]
     bb8: f8bd 0030    	ldrh.w	r0, [sp, #0x30]
     bbc: 4308         	orrs	r0, r1
     bbe: f8ad 0030    	strh.w	r0, [sp, #0x30]
     bc2: e7ff         	b	0xbc4 <ref_gc_import_core+0x330> @ imm = #-0x2
     bc4: e7ff         	b	0xbc6 <ref_gc_import_core+0x332> @ imm = #-0x2
     bc6: e7ff         	b	0xbc8 <ref_gc_import_core+0x334> @ imm = #-0x2
     bc8: e7ff         	b	0xbca <ref_gc_import_core+0x336> @ imm = #-0x2
     bca: e6a4         	b	0x916 <ref_gc_import_core+0x82> @ imm = #-0x2b8
     bcc: f817 0c09    	ldrb	r0, [r7, #-9]
     bd0: f817 1c0a    	ldrb	r1, [r7, #-10]
     bd4: 4048         	eors	r0, r1
     bd6: f817 1c0b    	ldrb	r1, [r7, #-11]
     bda: 4041         	eors	r1, r0
     bdc: f837 0c0e    	ldrh	r0, [r7, #-14]
     be0: 4041         	eors	r1, r0
     be2: f8bd 2030    	ldrh.w	r2, [sp, #0x30]
     be6: 4051         	eors	r1, r2
     be8: 9101         	str	r1, [sp, #0x4]
     bea: f7ff fffe    	bl	0xbea <ref_gc_import_core+0x356> @ imm = #-0x4
			00000bea:  R_ARM_THM_CALL	mantissa_unused_fix
     bee: 4601         	mov	r1, r0
     bf0: 9801         	ldr	r0, [sp, #0x4]
     bf2: 4048         	eors	r0, r1
     bf4: f807 0c01    	strb	r0, [r7, #-1]
     bf8: e7ff         	b	0xbfa <ref_gc_import_core+0x366> @ imm = #-0x2
     bfa: f817 0c01    	ldrb	r0, [r7, #-1]
     bfe: b010         	add	sp, #0x40
     c00: bd80         	pop	{r7, pc}
     c02: bf00         	nop

00000c04 <mantissa_unused_fix>:
     c04: b081         	sub	sp, #0x4
     c06: f8ad 0002    	strh.w	r0, [sp, #0x2]
     c0a: f8bd 0002    	ldrh.w	r0, [sp, #0x2]
     c0e: b001         	add	sp, #0x4
     c10: 4770         	bx	lr
